1. Field of the Invention
The present invention relates in general to an analog decoding method and decoder.
2. Description of Related Art
Channel coding is used in many communication systems. As a general trend, encoding techniques become more complex to facilitate a variety of desirable applications, such as high speed downlink packet access (for example). It is therefore necessary to provide appropriate decoding hardware.
A channel decoder is commonly implemented in the digital domain. There are two types of digital decoders. The first digital decoder implements an optimal decoding technique (or “APP” decoding) in which symbol error probability is minimized. The APP decoder for a trellis code performs a forward (or “alpha”) recursion starting at the beginning of the code block (code trellis) and a backward (or “beta”) recursion starting at the end of the code block (code trellis). The decoder output is calculated based on the results of the two recursions.
The second digital decoder implements a suboptimal decoding technique (or “sliding window” decoding). The sliding window decoder performs the same basic operations as the APP decoder, however, the sliding window decoder works on sub-blocks (or windows) of the overall code block. Since the backward recursion starts at the end of a window (rather than the end of the overall code block), a stabilization length is necessary (so that the backward recursion closely approximates the true values) before the decoder output can be calculated. As compared to an APP decoder, the sliding window decoder reduces both decoding delay and storage requirements.
Decoding solutions have also been implemented in the analog domain. Known analog decoders have a tailbiting structure in which the beginning and the end of the code trellis are connected together. These existing decoder implementations build the complete code trellis with analog circuitry. That is, the ring size of the analog decoder is equal to the overall block length of the code to be decoded. The applied signals travel around the tailbiting trellis freely until a stable state is reached.
Although conventional decoders are generally thought to be acceptable, they are not without shortcomings. For example, the analog decoder outperforms the digital decoders, and would therefore seem to be an ideal candidate for high speed applications. However, the complexity of the analog circuit grows linearly with the block length of the code since the whole code trellis is mapped onto the analog circuit. Thus, the analog decoder has been limited to applications involving relatively short and simple codes. Another problem is that a particular analog decoder can only be used for a fixed coding scheme (i.e., block length, rate, memory, and interleaver).